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ID: 2 // STATUS: COMPLETED
Electron Redstone CPU
4-Stage Pipelined 8-bit RISC CPU
01. System Overview
Designed 'Electron 2', a custom 8-bit ISA with a raw pipeline architecture, and hand-wired the implementation using Redstone digital logic gates in a simulation environment. The project includes a comprehensive toolchain engineered in Rust.
02. Engineering Challenges
Obstacle_01
Engineering a Rust toolchain that performs static analysis to detect data hazards inherent to the hardware design
Obstacle_02
Resolving interlocking constraints within a raw pipeline architecture
Obstacle_03
Porting the emulator to WebAssembly (WASM) to provide a performant in-browser visual debugger
03. System Outcomes
- ▶ Successfully modeled a functional CPU that runs complex algorithms within a logic-gate environment
- ▶ Delivered a comprehensive Rust-based ecosystem for emulation and assembly development
- ▶ Demonstrated deep systems engineering capabilities by bridging high-level software with low-level hardware design